Today SK Hynix announces the sampling of its new generation of DDR5 memory. The title is the commercialization of the new 24 gigabit motherboard, which offers 50% more capacity than the leading 16 gigabit matrices currently used on high-capacity DDR5. With the alleged 25% reduction in power consumption using SK Hynix’s latest 1a nm process node and EUV technology, what fascinates me the most is that for the first time in PC space (to my knowledge) we will get memory modules that are no longer two degrees.
For computer-based DDR memory, since DDR1 and earlier, memory modules have been configured as a power of two in terms of storage. Whether it’s from 16 MiB to 256 MiB to 2 GiB to 32 GiB, I’m pretty sure all the memory modules I’ve ever handled were deuces. SK Hynix’s new announcement shows that the new 24-gigabit chips will allow the company to make DDR5 modules with a capacity of 48 GiB and 96 GiB.
To be clear, the official DDR5 specification actually allows capacities that are not direct powers of the deuce. If we look at other types of memory, the powers of the deuce have been thrown out the window for some time, such as in smartphones. However, computers and servers, at least the traditional ones, followed the power of the two mantras. One of the changes in memory design that now brings ordinary modules to non-powering two capacities is that it is getting harder and harder to scale DRAM capacities. The time it takes to understand the complexity of technology to get 2x improvements each time is too long, and memory vendors will start taking those intermediate steps to bring the product to market.
However, in the traditional way, these chips and modules will first be intended for server use, for ECC and RDIMM design. It is a market that will absorb the costs of early hardware adoption, and SK Hynix even says the module is expected to power high-performance servers, especially in machine learning as well as other HPC situations. One of the quotes in the SK Hynix press release was from Intel’s Data Center Group, so if there is any synergy regarding support and implementation, this is probably the place to start. The server CPU with 8x 64-bit channels and 2 DIMMs per channel provides 16 modules, and 16 x 48 GiB provides a capacity of 768 GiB.
When this technology comes to the consumer market, we will have to take into account the costs and assume that these chips will be used on expensive hardware. So, maybe 48 GiB UDIMMs will be the first on the market, although there is a small possibility that 24 GiB UDIMMs will appear. Suddenly, the 128 GiB limit on a modern gaming desktop will grow to 192 GiB.
Source: SKHynix Newsroom
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